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Overview
The Digital Blocks DB-I2C-S-APB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 2.0 APB System Interconnect Fabric to an I2C Bus. The I2C is a two-wire bidirectional interface standard (SCL is Clock, SDA is Data) for transfer of bytes of information between two or more compliant I2C devices.
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Tech Specs
| Part Number | DB-I2C-S-APB |
| Short Description | I2C Slave Controller w/FIFO (APB Bus) |
| Provider | |
| Maturity | Successful in Customer Implementations |
| Foundry | Chartered, SMIC, LSI, STMicroelectronics, Silterra, GlobalFoundries, UMC, OKI |
| Target Process Node | Chartered, Global Foundries, Intel, LSI. OKI, Silterra, SMIC, STMicroelectronics, Tower, TMSC, UMC |