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Overview
The Digital Blocks DB-FPD-LVDS-TX LVDS Display Interface IP Core interfaces parallel 18-bit/24-bit RGB Pixel Data with display timing VSYNC, HSYNC, Data Enable, and Pixel Clock to a FPD LVDS compliant display panel via 3 or 4 LVDS Differential Data Pairs and 1 LVDS Differential Clock Pair.
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Tech Specs
| Part Number | DB-FPD-LVDS-TX |
| Short Description | FPD LVDS Display Interface - 1 & 2 Port LVDS Panels |
| Provider | |
| Maturity | Successful in Company FPGA Kit Demo Reference Design, Customer Products |
| Foundry | LSI, IBM, UMC |
| Target Process Node | IBM, LSI. TMSC, UMC, Tower |