RapidIO 2.0 PHY

Overview

The Innosilicon Serdes Combo PHY is a highly programmable module that processes high-speed serial data to parallel data compatible with the PHY Interface for RapidIO. The PHY supports the RapidIO 1.25/2.5G/3.125Gbps/6.25Gbps physical layer specifications.
The PHY module includes a top level wrapper integrating both the Physical Media Attachment (PMA) layer.

Tech Specs

Part Numberinno_rapidio2.0_phy
Short DescriptionRapidIO 2.0 PHY
Provider
Maturity Silicon proven and in volume production
FoundrySMIC, TSMC, GlobalFoundries
Geometry nm14, 28, 55, 65
Target Process NodeGF 14-55nm, SMIC 28-65nm, TSMC 28-65nm
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