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Overview
The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security Modules, IP Prototyping Kits and verification IP, is designed to meet all required features of the PCI Express® (PCIe®) 6.0, 5.0, 4.0, 3.1, 2.1, 1.1, and PIPE specifications. By providing a complete IP solution, Synopsys delivers
optimization across the individual IP to lower latency and ensures that all the IP functions seamlessly together to lower integration risk. The high-performance PCI Express IP solution is optimized for low power, small area and low latency.
optimization across the individual IP to lower latency and ensures that all the IP functions seamlessly together to lower integration risk. The high-performance PCI Express IP solution is optimized for low power, small area and low latency.
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Tech Specs
| Part Number | dwc_16g_phy_tsmc |
| Short Description | 16G PHY in TSMC (28nm, 16nm, 12nm, N7, N6) |
| Provider | |
| Maturity | Available on request |
| Foundry | TSMC |
| Geometry nm | 6, 7, 12, 16, 28 |
| Target Process Node | TSMC 28nm, 16nm, 12nm, N7, N6 - HPC+, FPGL, FFC, FF |