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Overview
Analog Bits’ PCIe Gen3 SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen3 serial bus standard where SRIS (Separate RefClk Independent Spread-spectrum clock generation) is required. This SSCG PLL is designed for digital logic processes and use robust design techniques to work in noisy SoC environments.
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Tech Specs
Part Number | PCIe Gen3 Class SSCG PLL |
Short Description | PCIe3 SSCG PLL - TSMC 16FFC |
Provider | |
Maturity | Silicon Proven |
Foundry | TSMC |
Geometry nm | 16 |
Target Process Node | TSMC 16nm CLN16FFC |