You are here : Other > Other

PCIe4 Ethernet SERDES PHY - TSMC N5

Overview

Analog Bits’ Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS). The integrated PHY for PCIe 4.0 operates at 2.5Gbps, 5Gbps, 8Gbps and 16Gbps, and is designed to meet higher performance standards required for enterprise market applications. The PHY additionally features an interface capability that allows integration with other customer-designed serial protocol PCS layers at any baud rate up to 16Gbps. The PMA is delivered as a hard macro while the fully-synthesizable soft PCS includes performing all necessary calibration and self-test functions. The universal PHY architecture allows forming arbitrarily wide efficient links by being independent of the need for a common CMU.

Tech Specs

Part NumberPCI Express GEN 3/4, Ethernet, Multi-protocol SERDES PHY, Automotive Grade
Short DescriptionPCIe4 Ethernet SERDES PHY - TSMC N5
Provider
FoundryTSMC
Geometry nm5
Target Process NodeTSMC 5nm CLN5
I understand
This website uses cookies to store information on your computer/device. By continuing to use our site, you consent to our cookies. Please see our Privacy Policy to learn more about how we use cookies and how to change your settings if you do not want cookies on your computer/device.