HDMI 2.0 Rx PHY & Controller IP, Silicon Proven in TSMC 40LP

Overview

The HDMI 2.O Rx IP complies with version 2.0b of the HDMI specification and offers the full functionality of an HDMI receiver. Physical layer (PHY) and link module make up its two modules. The PHY is upper compatible with DVI receiver and implemented as a hard IP based on TSMC 28HPC+ CMOS logic process, while the link module is implemented as a synthesizable soft IP. The transmission of audio visual content is shielded using an HDCP (High-bandwidth Digital Content Protection) encryption that is built-in.

Tech Specs

Part NumberHDMI 2.0 Rx PHY IP in 40LP
Short DescriptionHDMI 2.0 Rx PHY & Controller IP, Silicon Proven in TSMC 40LP
Provider
Maturity In Production
FoundryTSMC
Geometry nm40
Target Process NodeTSMC 40LP
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