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Overview
The HDMI receiver PHY (Physical layer), a single-port IP core, complies with all the specifications of HDMI 1.4. This HDMI RX PHY provides a straightforward system LSI solution for consumer electronics like HDTV and supports TMDS rates between 25MHz and 225MHz. The HDMI receiver link IP core and PHY work together most efficiently. All of the Fab/Nodes listed below have undergone Silicon Proving: Link Controller for an HDMI receiver that strictly adheres to HDMI 1.4a requirements (GF, Samsung, TSMC, UMC, SMIC, STMicro). This provides a straightforward system-onchip (SOC) implementation for consumer electronics including HD-TVs and AV receivers. It functions best when combined with our complementary HMDI receiver PHY IP core. The fundamental operations of HDMI can be changed to suit needs.
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Tech Specs
Part Number | HDMI 1.4 Rx PHY IP in 28FDSOI |
Short Description | HDMI 1.4 Rx PHY & Controller IP, Silicon Proven in ST 28FDSOI |
Provider | |
Maturity | In Production |
Foundry | FDSOI, STMicroelectronics |
Geometry nm | 28 |
Target Process Node | STMicro 28FDSOI |