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Overview
The DisplayPort transmitter PHY version 1.4 supports data rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2). built-in equalizer with programmable analogue features, 100-ohm termination resistors, and common-mode biassing the CDR bandwidth, the regulator voltage, the BGR voltage, and the terminator resistance Support 1.8V/0.9V power supplies for internal analogue signal monitoring and PLL testing.
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Tech Specs
Part Number | DisplayPort 1.4 Tx PHY IP in 28HPC |
Short Description | Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 28HPC |
Provider | |
Maturity | In Production |
Foundry | UMC |
Geometry nm | 28 |
Target Process Node | UMC 28HPC+ |