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Overview
The Display Port 1.4 Rx IP Channel's maximum capacity is supported. Programmable analogue parameters including CDR Bandwidth, Equalizer Strength, Terminator Resistor, and BGR Voltage are available up to 5.4bps per channel (HBR2). Additionally, they offer alternatives for testability such the PLL alone test and the analogue signal monitor.
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Tech Specs
| Part Number | DisplayPort 1.4 Rx PHY IP in 40SP |
| Short Description | Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 40SP |
| Provider | |
| Maturity | In Production |
| Foundry | UMC |
| Geometry nm | 40 |
| Target Process Node | UMC 40LP |