USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 22ULP

Overview

The PHY combo comprises Serial ATA (SATA) compliant with SATA 3.0 Specification, Peripheral Component Interconnect Express (PCIe) compliant with PCIe 2.0 Base Specification supporting PIPE interface spec, and Universal Serial Bus (USB) compliant with USB 3.0, USB 2.0 (USB High-speed and Full speed). Incorporating additional features such as PLL control, reference clock control, and built-in power gating control leads to reduced power usage. Moreover, the PHY is versatile for a wide range of situations with different power consumption needs due to the customizable low power mode setting mentioned above.

Tech Specs

Part NumberUSB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP in 22ULP
Short DescriptionUSB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 22ULP
Provider
Maturity In Production
FoundryTSMC
Geometry nm22
Target Process NodeTSMC 22ULP
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