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Overview
The first IP for PCIe 3.1 with L1 sub-states support
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Tech Specs
Part Number | 10Gbps Multi-Protocol PHY IP |
Short Description | 10Gbps Multi-Protocol PHY IP |
Provider | |
Maturity | Silicon proven |
Foundry | TSMC |
Geometry nm | 28 |
Target Process Node | TSMC 28nm |