New EFLX1K eFPGA Core Optimizes Area for 40-180nm Applications

The EFLX4K eFPGA IP core, both the Logic and DSP versions, have been fully validated on TSMC16FFC. The GDS is also compatible with TSMC16FF+ with no change, just retiming. Same for TSMC12FFC.

The EFLX-100 is an embedded FPGA IP core, for implementing reconfigurable logic, containing 120 Look-Up-Tables (LUTs) in Reconfigurable Building Blocks (RBBs), patented interconnect network, multiple ...

The EFLX-2.5K Logic IP core is an embeddable FPGA IP core each containing 2,520 Look-Up- Tables (LUTs) in Reconfigurable Building Blocks (RBBs) and 20Kb RAM, patented interconnect network, multiple cl...

EFLX-100 in TSMC 16FF+/FFC enables programmable networking chips with wide, reconfigurable logic from 100 to 2500 LUTs running about 1GHz (exact speed depends on the RTL and the voltage range). EFL...

For ASIC and SoCs designers who need fast, right-the-first time design and fast time to volume, Menta is unique in our ability to deliver proven eFPGAs in your selected technology for your specific ap...

Menta® eFPGA Core® IP is based on a high-density embedded programmable logic architecture designed to be used in SoC or ASIC. Using an eFPGA Core provides design flexibility and reduces time-t...

Menta eFPGAs are high-density embedded programmable logic IP digital IPs for use in SoCs or ASICs designed to address various markets and applications.

Menta IPs (IPMs) include a set of pre-configured programmable physical IPs. The IP catalog is currently available for TSMC 28HPM and GlobalFoundries 14LPP technologies, based on Mentas v4 eFPGA fabric.

Menta IPs (IPMs) include a set of pre-configured programmable physical IPs. The IP catalog is currently available for TSMC 28HPM and GlobalFoundries 14LPP technologies, based on Menta s v4 eFPGA fabric.

SPC (Synthesizable Programmable Core) is a soft FPGA core that is fully integrated into standard design flows and that allows the seamless implementation of generic RTL programmable logic in ASICs and SOCs.

Speedcore embedded FPGA (eFPGA) IP for integration SoCs is designed for compute and network acceleration applications and is based on the same high-performance architecture that is in Achronix s Speedster 22i FPGAs.

Low power SoCs are constantly required to include new and innovative functions. As a result, designers are looking for hardware solutions with the flexibility to add new features and still meet tight deadlines. Adding ArcticPro ultra-low power eFPGA is an ideal solution that can be customized to implement post production changes without costly and time consuming redesign.

Low power SoCs are constantly required to include new and innovative functions. As a result, designers are looking for hardware solutions with the flexibility to add new features and still meet tight deadlines. Adding ArcticPro ultra-low power eFPGA is an ideal solution that can be customized to implement post production changes without costly and time consuming redesign.

QuickLogic's radiation-hardened eFPGA IP uses the company's proven Australis eFPGA IP generation flow to provide customizable...

Gen4 architecture delivers 300% faster performance for AI/ML applications while drawing 50% less power and consuming 65% less die area compared to the previous Speedcore eFPGA generation.

Low power SoCs are constantly required to include new and innovative functions. As a result, designers are looking for hardware solutions with the flexibility to add new features and still meet tight deadlines. Adding ArcticPro ultra-low power eFPGA is an ideal solution that can be customized to implement post production changes without costly and time consuming redesign.