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85 "Wireline Communication" Solutions

1
10G PHY for PCIe 2.0 in TSMC (7nm)

The multi-lane DesignWare Multi-Protocol 10G PHY IP is part of Synopsys' high-performance multi-rate transceiver portfolio, meeting the growing needs for low-power consumption and low latency i...


2
10G PHY for PCIe 3.0 in TSMC (16nm) for Automotive

The multi-lane DesignWare Multi-Protocol 10G PHY IP is part of Synopsys' high-performance multi-rate transceiver portfolio, meeting the growing needs for low-power consumption and low latency i...


3
10G PHY for PCIe 3.0 in TSMC (16nm, 12nm, 10nm, 7nm)

The multi-lane DesignWare Multi-Protocol 10G PHY IP is part of Synopsys' high-performance multi-rate transceiver portfolio, meeting the growing needs for low-power consumption and low latency i...


4
10G TCP & UDP Offload Engines, Ultra Low latency
INT 25012 is the only SOC IP Core that implements a full 10G bit TCP and UDP Stack inHand crafted, Ultra-High Performance, Innovative, Flexible and Scalable architecture which can also be easily custo...

5
10G TCP+UDP Offload Engine+PCIe Ultra-Low Latency
INT 25012 is the only SOC IP Core that implements a full 10G bit TCP and UDP Stack in Handcrafted, Ultra-High Performance, Innovative, Flexible and Scalable architecture which can also be easily custo...

6
12G PHY

The multi-channel, multi-protocol DesignWare® Enterprise 12G PHY IP is part of Synopsys' high performance multi-rate transceiver portfolio, meeting the growing needs for high bandwidth in e...


7
12G PHY in TSMC (28nm, 16nm, 12nm)

The multi-channel, multi-protocol DesignWare® Enterprise 12G PHY IP is part of Synopsys' high performance multi-rate transceiver portfolio, meeting the growing needs for high bandwidth in e...


8
12G PHY in UMC (28nm)

The multi-channel, multi-protocol DesignWare® Enterprise 12G PHY IP is part of Synopsys' high performance multi-rate transceiver portfolio, meeting the growing needs for high bandwidth in e...


9
16G PHY

The multi-lane DesignWare® Multi-Protocol 16G PHY IP is part of Synopsys' high-performance multi-rate transceiver portfolio, meeting the growing needs for high bandwidth and low latency in ...


10
16G PHY in TSMC (28nm, 16nm, 12nm)

The multi-lane DesignWare® Multi-Protocol 16G PHY IP is part of Synopsys' high-performance multi-rate transceiver portfolio, meeting the growing needs for high bandwidth and low latency in ...


11
25G PHY

The multi-lane DesignWare Multi-Protocol 25G PHY IP is part of Synopsys' high-performance multi-rate transceiver portfolio for high-end networking and cloud computing applications. The PHY is s...


12
25G PHY in TSMC (16nm, 12nm, 7nm)

The multi-lane DesignWare Multi-Protocol 25G PHY IP is part of Synopsys' high-performance multi-rate transceiver portfolio for high-end networking and cloud computing applications. The PHY is s...


13
32G PHY in TSMC (7nm)

The multi-lane DesignWare® Multi-Protocol 32G PHY IP is part of Synopsys' high-performance multi-rate transceiver portfolio for high-end networking and cloud computing applications. The PHY...


14
40G TCP/UDP Offload Engine
INT 40011 is the only SOC IP Core that implements a full 40G bit TCP Stack in Handcrafted, Ultra-Low latency and High Performance, Innovative, Flexible and Scalable architecture which can also be easi...

15
50G//25G TCP/UDP Offload Engine
INT 25011 is the only SOC IP Core that implements a full 25G bit TCP Stack in Handcrafted, Ultra-Low latency and High Performance, Innovative, Flexible and Scalable architecture which can also be easi...

16
56G Ethernet PHY in TSMC (16nm, 7nm)
The idea of Fabri3 is to dis-aggregate the network from the servers and connect each server via PCIe cables to the Fabri3. Up to 64 servers can be attached to Fabri3 u...

17
6G PHY in TSMC (16nm)

The multi-lane DesignWare Multi-Protocol 6G PHY IP is part of Synopsys' highperformance multi-rate transceiver portfolio, meeting the growing needs for small area, low bill of materials (BOM) c...


18
Configurable Ethernet controllers, compliant with the IEEE and consortium specifications for a range of applications

DesignWare® Ethernet IP solutions consist of configurable controllers, PHYs supporting speeds of up to 400G, verification IP, IP Prototyping Kits, Software Development Kits, and Interface IP Su...


19
Mobiveil RapidIO Controller (GRIO)
Generic RapidIO (GRIO) controller is a highly flexible and configurable IP to provide RapidIO interface on one side and a generic interface on the system side.

20
NVMStor
NVMStor platform offers high performance and low power SSD solution with its UNH certified NVMe controller IP.

21
NVMStor-Ultra
NVMStor-Ultra platform offers high performance and low power SSD solution with its UNH certified NVMe controller IP (UNEX). Based on Xilinx's high performance ZYNQ Ultrascale plus FPGA,

22
Speedster7t FPGAs
Speedster®7t FPGAs are optimized for high-bandwidth workloads and eliminate the performance bottlenecks associated with traditional FPGAs.

23
112G LR Multi-protocol SerDes PHY
An ADC-based long-reach (LR) 112G SerDes PHY solution providing leading-edge performance and power efficiency for next-generation networking and hyperscale data center applications.

24
RAMLinx interconnect
RAM of any size and kind in your EFLX® array

25
C2C Chip to Chip Link Inter-chip Connectivity IP
The purpose of inter-chip connectivity IP is to connect two different chips together to share computing resources, limit chip-to-chip latency, or maintain the highest possible chip-to-chip bandwidth. ...

26
Comcores JESD204C
The JESD204C controller IP is a highly optimized and silicon agnostic implementation of the JEDEC JESD204C standard targeting any ASIC, FPGA or ASSP technologies.

27
FlexLLI MIPI Low Latency Interface (MIPI LLI) Digital Controller Interchip Connectivity IP
Arteris FlexLLI digital controller IP is the industry s first and only silicon-proven implementation of the MIPI Low Level Interface (LLI) specification. Arteris FlexLLI digital controller IP can con...

28
FlexNoC Network on Chip SoC Interconnect IP
FlexNoC is the ideal interconnect for SoC designs requiring higher performance with minimum area and power. Its flexible architecture makes it the right solution for interconnects with both low latency requirements and high throughput needs. FlexNoC provides support for the additional features that today SoCs require, such as clock domain conversion, width conversion, security, and multi-protocol support. The product supports the AMBA (APB, AHB, AXI) protocols and OCP and can easily be extended to support proprietary protocols.

29
FlexNoC Resilience Package
The Arteris FlexNoC Resilience Package provides hardware-based data protection for increased SoC reliability and functional safety.

30
FlexNoC Resilience Package IP
The Arteris FlexNoC Resilience Package is a complementary product to Arteris FlexNoC fabric IP. It implements hardware resilience features essential for systems-on-chip (SoCs) targeted for mission-cri...

31
Gigabit Ethernet PHY IP
Faraday has developed the Ethernet PHY solutions for its ASIC SoC designs and IP licensing from UMC 0.13um to 28nm process.

32
Ncore Cache Coherent Interconnect IP
For scalable and area-efficient heterogeneous cache coherent systems.

33
PIANO 2.0 Automated Interconnect Timing Closure Technology
PIANO 2.0 solves back-end timing problems with technology that works earlier in the SoC design flow, thereby reducing schedule risk.

34
SerDes Long Reach (LR) 8 lane macro 112Gbps PHY on TSMC N7
eSilicon is a fabless semiconductor company founded in 2000 in San Jose, California. eSilicon designs and manufactures digital CMOS and finFET ASICs. In addition, eSilicon designs market-specific semi...

35
SerDes Long Reach (LR) 8 lane macro 56Gbps PHY on TSMC N7
eSilicon is a fabless semiconductor company founded in 2000 in San Jose, California. eSilicon designs and manufactures digital CMOS and finFET ASICs. In addition, eSilicon designs market-specific semi...

36
TSN Ethernet Subsystem
Time-Sensitive Networking (TSN) enhances Ethernet (specifically IEEE 802.1 and 802.3) and adds a variety of functions and capabilities.

37
100G Optical DSP
Credo mixed signal DSPs for optical connectivity are enabling the cloud-scale datacenter buildouts for 100G and 400G. The Raptor 100 and Raptor 400 are built on a mature process technology, providing ...

38
200/400 Gigabit Ethernet MAC and PCS Solution
Traffic demand in the carrier backbone continues to grow rapidly, driven by a number of popular applications such as IPTV, video-on-demand services, remote storage, mobile broadband services, and VPN ...

39
400G Optical DSP
Credo mixed signal DSPs for optical connectivity are enabling the cloud-scale datacenter buildouts for 100G and 400G. The Raptor 100 and Raptor 400 are built on a mature process technology, providing ...

40
Dual ODU0 Mapper / Demapper
The Xelic Optical Transport Network (OTN) Dual ODU0 Mapper/Demapper performs mapping/demapping of two 1000 BASE-X Gigabit Ethernet signals encapsulated in transparent GFP frames to/from a single OTN ODU1 frame format or two independent ODU0 data streams.

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