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33 "Ethernet" Solutions

1
Ethernet IP Subsystem
Comprehensive portfolio of fully configurable multi-channel, multi-rate Ethernet MAC, PCS and FEC IP. Support for the OIF FlexE in addition to IEEE 802.3 standard for data center applications.

2
Ethernet Packet Processor

Gigabit Ethernet has become the leading choice for routing data around today's cars as they become increasingly complex automotive computing platforms. To meet the needs for flexible, high-spee...


3
Ethernet Subsystem 10G/25G
Comcores Ethernet Subsystem is a silicon-agnostic, easy-to-use integration of 10G/25G Ethernet MAC and PCS for Time-Aware Applications. The Subsystem comes in different variations and can be delivered...

4
Gigabit Ethernet PHY IP
Faraday has developed the Ethernet PHY solutions for its ASIC SoC designs and IP licensing from UMC 0.13um to 28nm process.

5
56G Ethernet PHY in TSMC (16nm, 7nm)

The DesignWare 56G Ethernet PHY IP meets the growing high bandwidth and low latency needs of high-performance data center applications. Using leadingedge design, analysis, simulation, and measureme...


6
Configurable Ethernet controllers, compliant with the IEEE and consortium specifications for a range of applications

DesignWare® Ethernet IP solutions consist of configurable controllers, PHYs supporting speeds of up to 400G, verification IP, IP Prototyping Kits, Software Development Kits, and Interface IP Su...


7
DesignWare 200G/400G Ethernet PCS IP
The DesignWare 200/400G and 800G Ethernet MAC and PCS IP solutions enable a host to transmit and receive data over Ethernet. The PCS IP is optimized for low latency and supports multi-rates for up to ...

8
Dual ODU0 Mapper / Demapper
The Xelic Optical Transport Network (OTN) Dual ODU0 Mapper/Demapper performs mapping/demapping of two 1000 BASE-X Gigabit Ethernet signals encapsulated in transparent GFP frames to/from a single OTN ODU1 frame format or two independent ODU0 data streams.

9
Dual Port Gigabit Ethernet Transcode Application
The Xelic XA304 Application supports the mapping of dual Transcoded Gigabit Ethernet signals into ODU0 frames and ODTU01 multiplexing for ODU1/OTU1 frame rate transport.

10
TCP/IP - 10 &25Gbit Ethernet TCP server/client
The CT1008-TCP/IP is an FPGA Synthesisable 10 or 25Gbit Ethernet TCP server/client in a lean and fast, all-RTL solution

11
TSN Ethernet Subsystem
Time-Sensitive Networking (TSN) enhances Ethernet (specifically IEEE 802.1 and 802.3) and adds a variety of functions and capabilities.

12
XGUDP - 10G and 25Gbit/s Ethernet UDP/IP EndPoint for FPGAs
Chevin Technology�s 10G & 25G UDP Ethernet IP is FPGA Synthesisable EndPoint with Checksum Offload for ultra low-latency connectivity.

13
10G-1.6T Ethernet/FiberChannel/FlexO Core
The 10G-1.6T Multi-channel Multi-rate Ethernet/FiberChannel/FlexO Core (Epak1p6T_ZX) from Precise-ITC is a multi-rate Ethernet aggregator that supports tributaries from 800GE, to 1GE

14
800G_AX
Precise-ITC released the 800G_AX, an Ethernet IP core that is highly optimized for AI/Machine Learning applications.

15
Comira Ethernet IP Solution
CoMira's multi-channel, multi-speed Ethernet universal media access control (MAC) and physical coding sublayer IP (UMAC) is fully configurable and programmable to support "any rate on any channel" (400G/200G/100G/50G/25G/10G/1G).

16
E-pak 400G/200G SoC
E-pak System on chip IP Core

The E-pak SOC core from Precise-ITC is a multi-rate Ethernet aggregator that supports tributaries at 10GE, 25GE, 40GE, 50GE, 100GE and 200GE in combinations up t...


17
E-pak 800G IP Core
Multi-rate/Multi-lane FlexE, Ethernet 1G/10G/25G/40G/50G/100G/200G/400G/800G

18
Ethernet- over- Coax MAC/PHY Transceiver
The CREDO C8800(P) is a MAC/PHY transceiver optimized for Ethernet-over-Coax (EoC) applications. It includes an EPON-based MAC and an OFDM +LDPC PHY. The C8800 can be used for channels such as coax ca...

19
Gen-Z Physical Layer for 802.3
The IPC-GZ196A-ZM Gen-Z Physical Layer for 802.3 is an IP Core that allows companies to attach a Gen-Z core to an 802.3 Phy.

20
Low latency Network TAP IP-Core for full duplex 100M/1G Ethernet links
SCS-TAP is a Passive Network TAP IP-Core that gives a complete visibility of the traffic data on the contrary of SPAN ports (also called mirror ports) monitoring approach that is supported by most switch vendors.

21
Single port 10/100 Fast Ethernet Transceiver - TSMC12nm FFC
SP-10_100_ETHERNET-T12FFC is a single-port DSP-based Fast Ethernet Transceiver. It contains all the active circuitry required to convert data stream to and from a Media Access Control (MAC) and to and...

22
Universal Ethernet MAC
The Universal Ethernet MAC/PCS offers industry s lowest latency, power, and size.

23
200G/400G Single Channel Ethernet MAC/PCS IP
RSm400™ is a new 200G/400G Single Channel Ethernet MAC/PCS/FEC product targeting ASIC and SoC devices.

24
ARASTU_ETH_10G - Ethernet 1G/10G Switch for low latency applications
Time critical applications, such as Trading Stock Exchange’s, Airport Terminals etc. require systems that deliver high throughput with low latency, as negligence even by a millisecond can prove ...

25
Ethernet 1G/10G Switch for low latency applications
Arastu System's Ethernet 10G Switch IP Core is designed to fit into today's FPGA and ASIC technologies with low gate count.

26
HPS - HSR-PRP Switch IP Core
HSR-PRP Switch (HPS) is an IP Core for the implementation of High-availability Seamless Redundancy and Parallel Redundancy Protocol standards for Reliable Ethernet communications.

27
Managed Ethernet Switch (MES) IP, supporting IEEE 1588 V2 One Step Transparent Clock P2P functionality
Managed Ethernet Switch (MES) IP core features a non-blocking crossbar matrix that allows continuous transfers between all the ports. It implements a Store & Forward switching approach that fulfills E...

28
MES - Managed Ethernet Switch IP Core
Managed Ethernet Switch (MES) IP core features a non-blocking crossbar matrix that allows continuous transfers between all the ports.

29
Multiport TSN Switch IP Core
Multiport Time Sensitive Networking (MTSN) Switch IP core supports IEEE 802.1AS to provide precise time synchronization of the network nodes to a reference time by synchronizing distributed local clocks with a reference and IEEE 802.1Qbv for a enhanced traffic scheduling.

30
UltraScale+ Integrated 100G Ethernet Subsystem
The Xilinx 100G Ethernet Subsystem provides high-performance interconnect technologies for communications equipment and flexibility in implementing emerging interface standards.

31
XpressGXA10-LP1151
The XpressGXA10-LP1151 is a low-profile PCIe network processing FPGA board, featuring 40G Ethernet. The Target applications are as wide as Fog Computing, Finance, Acceleration, Networking and Security.

32
Single Dealer Platforms
The advent of Single Dealer Platforms (SDPs) is advancing the state of the art of investment banking by integrating the delivery of pricing, risk and liquidity to traders. By aggregating information a...

33
Switch Hermes 3/1 BRR
The The DESwitch Hermes 3/1 BRR is a combined switch ECU which is designed for the evaluation of multiple communication standards including Audio-Video Bridging (AVB), Time-Sensitive Networ...

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