时间 : 2026年9月10日

地点: 中国,上海,浦东新区盛夏路669弄,张江高科 集云天地T3
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Join D&R IP SoC China 26 !!        A worldwide connected Event !!
D&R Events
    • IP-SoC Days 2026
    • IP-SoC Days 2025
    • IP-SoC Days 2024
    • IP-SoC Days 2023
    • IP-SoC Days 2022
    • IP-SoC Days 2021
    • IP-SoC Days 2020
    • IP-SoC Days 2019
协办单位:
Shanghai EDA/IP Innovation Center
In association with:
   上海硅知识产权交易中心
   上海嘉韬实业有限公司
A worldwide connected Event !!

D&R IP-SoC China 2026 是中国首个完全致力于IP(硅知识产权)和基于IP电子系统的独特全球性活动。

作为芯片设计业创新的种子,IP-SoC展商受邀展示他们最新的产品和服务,并分享他们对半导体行业下一步创新的展望。

IP用户可以一目了然地查看最新的技术趋势和令人兴奋的创新IP/SoC产品。通过全局视角,电子系统领袖可以识别颠覆性创新,带来新的细分市场增长。

本活动将是一次线下面对面会议。为了增强市场关注度,演讲材料和视频将同时发布在 www.design-reuse-china.com 和Youku上。

有任何问题吗? 请与我们联系。

9.00 am
欢迎会
Chairperson: Gabrièle Saucier - Design And Reuse
Welcome to the IP SoC world
Gabrièle Saucier
CEO
Design & Reuse
The AI-Powered IP Era: From Intelligent Design to Intelligent IP
戴伟进
首席战略官
芯原股份
Full‑Spectrum RISC‑V IP: Removing Boundaries for Computing
Bob Hu
Founder and Chairman
Nuclei System Technology
9.45 am
Break
10.00 am
AI Chip Architecture I
Architecting the AI Future with RISC-V
范涛
商务拓展总监
Sifive, Inc.
RISC-V+DSA: Pioneering a New Paradigm of Specialized Computing for Edge AI Fields
Zeng Yi
CEO
WingSemi Technology
AI ASIC Chip Platform
徐伟
Senior Design Director,
JoinSilicon
10.45 am
Break
11.00 am
AI Chip Architecture II
Chairperson: Franky Fan - Sifive
YouIP & YouSiP: Dual Engines Powering AI Chip Innovation in the Intelligent Computing Era
Eunice Rao
IP Project Director
Brite Semiconductor
Reshaping AI Chip Architecture: Advances in High-Speed Interface IP and Chiplet Integration
Jing Li
Director of Product Marketing
MSquare Technology
Wasted Voltage Margin is Wasted Performance: Returning Lost Performance to AI Systems
Julian Hu
VP China Sales
Movellus, Inc.
11.45 am
Break
12.00 pm
AI Memory strategy
Scalable Memory-Centric Inference IP Platform
Andy Kwon
Head of Partnerships and Overseas Sales
Articron
Intelligent Edge to AI Data Center: Optimized Memory and Storage IP solutions
Ravi Thummarukudy
Mobiveil Inc.
AI Inference Needs a Mix-and-Match Memory Strategy
Kai Zhao
SPE Field Applications Engineering, Silicon IP
Rambus, Inc.
1.00 pm
Lunch Break
Room 1
Packaging Solutions
Chairperson: Bulu Xu, SSIPEX
面向下一代 AI Chiplet 系统的硅验证 UCIe-A 与 SerDes IP
肖莹
Qualitas Semiconductor
From Monolithic SoCs to Chiplets: A New Hardware Security Paradigm
Samuel Chiang
Director of Business Development, Semiconductor IP Partnership
Rambus, Inc.
RAPTuner: An AI-Agent-Friendly Physical-Aware EDA Platform for Single-Die and Die-to-Die Design Optimization
Chin Choi Phaik
SkyeChip
Foundation IP
Chairperson: Bulu Xu, SSIPEX
Synopsys SLM PVT(工艺/电压/温度)监测 IP 概述
刘兴刚
Sales Account Management, Staff
Synopsys, Inc.
自动化标准单元布局合成与优化:赋能DTCO探索
Yiyun Zhang
Senior Project Manager
Huaxin Jushu (Hangzhou) Microelectronics Co., Ltd.
EDA Design Methodology and Tools
Empowering SRAM IP Design Efficiency through Advanced EDA Tools
徐历柔
Primarius Tech
基于大语言模拟和人工智能的EDA设计方法
Zeng Xuan
PhD supervisor/advisor
School of Microelectronics, Fudan University
Room 2
VPU and GPU
Chairperson: Alex Zhou, Innosail
芯原可扩展VPU IP赋能高性能AI服务器、嵌入式系统及超低能耗可穿戴设备
姜启军
Vice President of VPU Product
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
GPU 硬件虚拟化技术
郑魁
product director
Imagination Technologies Group Ltd.
Interface and SoC Design
Chairperson: Alex Zhou, Innosail
High-Speed nterconnects Empower Computing to the Edge
Qing Chang
Marketing Director
KNiulink Semiconductor Ltd.
Breaking the Data Bottleneck: Hardware Compression IP for Next-Generation AI, Storage, and High-Performance SoCs
Dr. Calliope-Louisa Sotiropoulou
Sales Engineering Manager
CAST
Video subsystem
Chairperson: Alex Zhou, Innosail
Why Next-Generation Video Subsystems Need AV2?
Yujing Wei
VP APAC Business Development
Allegro DVT
Automotive and high safety application
Chairperson: Alex Zhou, Innosail
打造可信边缘:赋能新一代汽车AI安全
Matthew Ma
Sr Staff Application Engineering
Synopsys, Inc.
Innovation in Distributed Functional Safety
艾克
Senior Applications Engineering Manager
Imagination Technologies Group Ltd.
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