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Single Port SRAM Compiler IP, 4.0um2 bit cells, High density, Low Power, UMC 0.18um G2 process

Overview

UMC 0.18um GII Logic process synchronous high density, Low Power mini Single Port SRAM.

Tech Specs

Part NumberFSA0A_D_SL
Short DescriptionSingle Port SRAM Compiler IP, 4.0um2 bit cells, High density, Low Power, UMC 0.18um G2 process
Provider
FoundryUMC
Geometry nm2, 180
Target Process NodeUMC 180nm G2
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