Ultra-Low-jitter Ring PLL

Overview

Integer PLL combines low area with wide range and very low jitter for clocking AFEs and providing reference sources for High-speed serial links

Tech Specs

Part NumberPLLTS40LPLJINT
Short DescriptionUltra-Low-jitter Ring PLL
Provider
Maturity GDS2
FoundryTSMC
Geometry nm28, 40, 55
Target Process NodeTSMC 28nm, 40nm, 55nm
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