SEARCH IP
- - Categories
  - RISC-V
  - Embedded Processing
  - 5G, 3GPP LTE IP
  - IoT IP
  - Artificial Intelligence IP
  - Automotive IP
  - Space and Avionics
  - Security IP
  - Audio & Video IP
- - Design Platforms
  - Monitoring and Verification
  - SoC Design Services
  - Find your best SoC design partner
Partner Videos
D&R Events
- - IP-SoC Days 2024
  - IP-SoC Days 2023
  - IP-SoC Days 2022
  - IP-SoC Days 2021
  - IP-SoC Days 2020
  - IP-SoC 2023
  - IP-SoC 2022
  - IP-SoC 2021
  - IP-SoC 2020
NEWS

You are here : Memory & Logic Library > Standard cell

6 track Ultra High Density standard cell library at TSMC 55 nm

Overview

Foundry Sponsored, TSMC 55 LeFP, SESAME uHD for ultra high-density logic design thanks to 6-track cells combined with pulsed latch cells acting as spinner cells (densest alternative to flip-flops).

Please sign in to view full IP description :

Tech Specs

Part Number	SESAME-uHD-BTF_TSMC_55nm_eFlash_SVT
Short Description	6 track Ultra High Density standard cell library at TSMC 55 nm
Provider
Maturity	Pre-silicon
Foundry	TSMC