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Overview
The LPDDR4/ DDR4/ DDR3L Combo PHY IP offers low latency and supports throughput of up to 1866Mbps. The PHY IP is silicon validated in the TSMC 28HPC+ process technology, complies with the most recent JEDEC requirements, and is created for quick integration and market entry.
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Tech Specs
Part Number | LPDDR4/ DDR4/ DDR3L Multi PHY IP in 28HPC+ |
Short Description | LPDDR4/ DDR4/ DDR3L PHY IP - 1866Mbps (Silicon Proven in TSMC 28HPC+) |
Provider | |
Maturity | In Production |
Foundry | TSMC |