|
Overview
SkyeChip’s High Bandwidth Memory (HBM) IP consists of a PHY and memory controller optimized for TSMC N7, N12 and Samsung 4nm process to support the HBM3 memory standard operating at up to 6.4 Gbps/pin. SkyeChip’s HBM IP is designed for high memory throughput and low latency applications while minimizing area and power consumption.
Please sign in to view full IP description :
Tech Specs
Part Number | HBM3 PHY & Controller |
Short Description | HBM3 PHY & Controller |
Provider | |
Foundry | TSMC |
Geometry nm | 4, 7, 12 |
Target Process Node | TSMC N12, N7, SF4 |