www.design-reuse-embedded.com
Search Solutions  
OK
13 "Monitoring and Debugging" Solutions

1
POR, Power-on-Reset and Supply Monitoring

The S3PORT40LP is a low-power reset circuit that provides following features:

Power-on Reset (POR) signal that monitors absolute value of three power supplies. POR signal includes programmab...


2
Analytics and optimization

System designers can use Tessent Embedded Analytics SoC monitoring and analytics features to refine performance based on the in-silicon behavior of their SoCs.

All too often, the real-world ...


3
In-field
Use of on-chip processing allow the system manufacturer to enable development and optimization to be performed on the finished system, even after the device is shipped.

4
Proteus
A one-stop software platform which applies analytics to data created by on-chip Agents™

5
SoC Debug
The average SoC now has more than 100 IP blocks. Such devices are powerful, but there is a problem: they are so complex that it is effectively impossible to understand how they operate in every circumstance.

6
Corvette-F1 N25
Corvette-F1 N25 is an Amazon FreeRTOS-qualified, Arduino-compatible and FPGA-based evaluation platform.

7
In-Chip Monitoring Subsystem for Process, Voltage & Temperature (PVT) Monitoring
A full suite of embedded monitoring IP managed by a PVT controller with standard interfaces, creates a complete subsystem dedicated to maximizing performance, optimizing power, reliability and enablin...

8
PVT Controller (Series 4) (Sub-system for complete PVT monitoring)
The PVT Controller provides a standard digital interface to the embedded Process, Voltage and Temperature (PVT) sensing Sub-System used to increase System on Chip performance and reliability. On-chip ...

9
SHS is an automated hierarchical test solution for efficiently testing system-on-chips (SoCs) or designs using multiple IP/cores

The DesignWare® STAR Hierarchical System is an automated hierarchical test solution for efficiently testing system-on-chips (SoCs) or designs using multiple IP/cores, including analog/ mixed-si...


10
SMS is a comprehensive, integrated test, repair and diagnostics solution
The DesignWare® Self-Test and Repair (STAR) Memory System™ is a comprehensive, integrated test, repair and diagnostics solution that supports repairable or nonrepairable embedded memories across any f...

11
Deep capture / high visibility Debug IP for Intel FPGA
The customizable IP core is a logic analyzer core that can be used to monitor the internal signals of an FPGA design without having to store the full trace data in the FPGA.

12
Deep capture / high visibility Debug IP for Xilinx FPGA
The customizable IP core is a logic analyzer core that can be used to monitor the internal signals of an FPGA design without having to store the full trace data in the FPGA.

13
Enhanced Services Controller - Performance Monitoring
The MESC_PM3X function, implemented on a Spartan II FPGA, is to extend the functionnality already available within the APC. This macro can be customized according to specific needs (application-specif...

 Back

Partner with us

 

List your Products

Suppliers, list and add your products for free.

More about D&R Privacy Policy

© 2021 Design And Reuse

All Rights Reserved.

No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.