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12 "Simulation and Verification" Solutions

1
Analog FastSPICE Platform

Foundry-certified, the AFS Platform delivers nm SPICE accuracy >5x faster than traditional SPICE and >2x faster than parallel SPICE simulators. Offering the world s fastest nm circuit verification ...


2
SD Express Card Verification IP
Truechip's SD Express Card Verification IP provides an effective & efficient way to verify the components interfacing with SD Express Interface of an ASIC/FPGA or SoC.

3
Display port 2.0 VIP
Display port 2.0 is the serial communication protocol developed by Video Electronics Standards Association(VESA) to support the video,audio and other data between a source device and sink device. Display port 2.0 VIP can be used to verify transmitter or Receiver device following the Display port basic protocol as defined in Display port 2.0.

4
NVMe-Xactor VIP Solution
NVMe-Xactor is a comprehensive VIP solution portfolio for NVMe 1.2 used by SoC and IP designers to ensure comprehensive verification and protocol and timing compliance.

5
OpenCAPI VIP
The SmartDV s OpenCAPI Verification IP is fully compliant with OpenCAPI Specification V3.0 and V3.1 and verifies OpenCAPI interfaces.

6
SimAccel FPGA-Accelerated Verification
Accelerate RTL Verification and SW Bring-up Target IPs and SoCs
  • NVMe controller
  • PCIe RC/EP IP, Repeater, Switch
  • Flash controller
  • AMBA NoCs and peripherals
  • M...

7
SimCluster GLS
Gate-Level Parallel Simulation : Reduce Time to Simulation Sign-off

8
SimXACT - Gate Simulation Productivity and Analysis Technology
Gate-Level X-Verification : Reduce Bring-up Time

9
TileLink VIP
TileLink Verification IP provides an smart way to verify the TileLink component of a SOC or a ASIC.

10
VC Functional Safety Manager
VC Functional Safety Manager provides a comprehensive tool for IP and semiconductor groups targeting functional safety certification for ISO 26262, IEC 61508 and other functional safety standards. It ...

11
Multi-domain simulation at the system-level for mixed signal behavior modeling
VisualSim Simulation Technology - heterogeneous models of computation

12
Performance modeling using stochastic components
In VisualSim Architect, one can model designs as stochastic processes, with library blocks and simulators supporting the same. The latency, in seconds, and throughput, measured in Mbps, gives the efficiency of the stochastic process. Designer can put into use, different use cases and get the expected output.

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