|
|
Overview
Dual Port SRAM compiler - TSMC 40 nm uLP - Memory optimized for high density and low power - Dual Rail - compiler range up to 288 k
Please sign in to view full IP description :
Tech Specs
| Part Number | DpRAM-ERA-DR-HD-RR-ERS_b-LP-SVT_SVT_TSMC_40nm_ULP |
| Short Description | Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Rail - compiler range up to 288 k |
| Provider | |
| Maturity | Pre-silicon |