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 Samsung  Silterra  SMIC
 STMicroelectronics  TowerJazz  TPSCo
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Geometry
 2 nm  3 nm  4 nm  5 nm  6 nm  7 nm
 8 nm  10 nm  11 nm  12 nm  13 nm  14 nm
 15 nm  16 nm  18 nm  20 nm  22 nm  25 nm
 28 nm  35 nm  40 nm  45 nm  54 nm  55 nm
 63 nm  65 nm  80 nm  85 nm  90 nm  95 nm
 108 nm  110 nm  130 nm  135 nm  140 nm  150 nm
 152 nm  153 nm  160 nm  180 nm  220 nm  250 nm
 280 nm  300 nm  350 nm  400 nm  450 nm  500 nm
 1340 nm  1370 nm
OK
1862 Silicon IP

1
High-Density eMRAM Compiler TSMC 22ULL
dwc_comp_ts22nlh41p11saemr128s

2
NVM FTP Trim in SMIC (180nm, 110nm)
dwc_nvm_ftp_trim_smic

3
NVM FTP Trim in TowerJazz (180nm)
dwc_nvm_ftp_trim_towerjazz

4
NVM FTP Trim in TSMC (180nm, 152nm, 150nm, 130nm)
dwc_nvm_ftp_trim_tsmc

5
NVM MTP in Silterra (180nm)
dwc_nvm_mtp_silterra

6
NVM MTP in TSMC (180nm, 152nm, 65nm, 55nm, 40nm)
dwc_nvm_mtp_tsmc

7
NVM OTP in Dongbu (180nm, 150nm, 110nm)
dwc_nvm_otp_dongbu

8
NVM OTP in Fujitsu (90nm, 65nm, 55nm, 40nm)
dwc_nvm_otp_fujitsu

9
NVM OTP in SMIC (110nm, 65nm, 55nm, 40nm)
dwc_nvm_otp_smic

10
NVM OTP in TSMC (180nm, 152nm, 130nm, 110nm, 90nm, 65nm, 55nm, 40nm, 28nm, 22nm, 16nm, 12nm, N7, N6, N5, N4P)
dwc_nvm_otp_tsmc

11
NVM OTP in UMC (180nm, 153nm, 110nm, 90nm, 80nm, 55nm, 40nm, 28nm, 22nm)
dwc_nvm_otp_umc

12
Dual Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 80 k
DpRAM-ERIS-NV-HD-RR.b-HVT.HVT_TSMC_90nm_eF_Generator

13
Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Rail - compiler range up to 288 k
DpRAM-ERA-DR-HD-RR-ERS_b-LP-SVT_SVT_TSMC_40nm_ULP

14
Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 64 k
DpRAM-ERA-DV-HD-RR.b-eHVT.SVT-HVT_TSMC_55nm_ULP

15
Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 64 k
DpRAM-ERA-DV-HD-RR.b-eHVT.SVT-HVT_TSMC_55nm_ULP-eF

16
Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 72 k
DpRAM-ERA-M1-DV-HD-RR.b-eHVT.SVT-HVT_TSMC_55nm_ULP-eF

17
Metal programmable ROM compiler - Memory optimized for low power - compiler range up to 1024 k
sROMet-PHOENIX-uHDeLL_TSMC_90nm_LP_Generator

18
Metal programmable ROM compiler - Memory optimized for low power and high density - compiler range up to 1024 k
dROMet-CASSIOPEIA_TSMC_152nm_LP_Generator

19
Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
dROMet-CASSIOPEIA_TSMC_152nm_G_Generator

20
Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
dROMet-CASSIOPEIA-DV_TSMC_180nm_G_Generator

21
Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
dROMet-CASSIOPEIA-DV_TSMC_180nm_eLL_Generator

22
Single Port Register File compiler - Memory optimized for high density and high speed - compiler range up to 40 k
1PRFile-AURA-HD-RR_TSMC_55nm_LP_Generator

23
Single Port Register File compiler - Memory optimized for high density and high speed - compiler range up to 40 k
1PRFile-AURA-HD-RR_TSMC_65nm_LP_Generator

24
Single Port Register File compiler - Memory optimized for high density and high speed - compiler range up to 40 k
1PRF-AURA-NV-HD-RR_b-HVT_SVT_TSMC_90nm_eF_Generator

25
Single Port Register File compiler - Memory optimized for high density and speed - Dual Voltage - compiler range up to 40 k
1PRFile-AURA-HD-RR-DV_TSMC_90nm_uLL_Generator

26
Single Port Register File compiler - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 40 kbits
1PRFile-AURA-HD-RR-DV.b-uLL.SVT-HVT_TSMC_90nm_uLL

27
Single Port Register File compiler - Memory optimized for ultra high density and high speed - compiler range up to 20 k
1PRF-AURA-NV-HD-RR_TSMC_110nm_HV_Generator

28
Single Port Register File compiler - Memory optimized for ultra high density and high speed - compiler range up to 20 k
1PRFile-AURA-HD-RR_TSMC_110nm_HV32_Generator

29
Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k
SpRAM-RHEA-HD-RR_TSMC_55nm_LPeF_Generator

30
Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k
SpRAM-RHEA-HD-RR_TSMC_110nm_HV32_Generator

31
Single Port SRAM compiler - Memory optimized for high density and speed - Dual Voltage - Compiler range up to 640 kbits
SpRAM-RHEA-LL-DV.b-uLL.SVT-HVT_TSMC_90nm_uLL

32
Single Port SRAM compiler - Memory optimized for ultra high density and low power - 3ML- compiler range up to 320 k
SpRAM-LYRA-NV-HD.b-SVT.LVT-SVT_TSMC_55nm_HV

33
Single Port SRAM compiler - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k
SpRAM-PLUTON-eLC-HD-RR-DV_TSMC_180nm_uLL_Generator

34
sROMet compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 1M
sROMet-TITAN-DV_TSMC_55nm_uLP

35
sROMet compiler - TSMC 40 nm uLPeFlash - Non volatile memory optimized for high density and low power - Dual Voltage - compiler range up to 1M
sROMet-TITAN-DV_TSMC_40nm_uLPeF

36
Two Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 64 k
2PRF-ERA-DV-HD-RR.b-eHVT.SVT-HVT_TSMC_55nm_ULP-eF

37
Two Port Register File compiler - Memory optimized for high density and low power optimized - compiler range up to 40 k
2PRF-ERIS-NV-HD-RR.b-HVT.HVT_TSMC_90nm_eF_Generator

38
Two Port Register File compiler - Memory optimized fore high density and high speed - compiler range up to 320 k
2PRFile-ERA.SVT_TSMC_55nm_HV

39
Two Port Register File compiler - Memory optimized fore high density and high speed - compiler range up to 320 k
2PRFile-ERA.SVT-LVT_TSMC_55nm_HV

40
Single Port Register File compiler - Memory optimized for high density and high speed - Dual voltage - compiler range up to 40 k
1PRF-AURA-DV-HD-RR_b-HVT_SVT_TSMC_90nm_eF_Generator

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