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13 "Intra SoC Connectivity" SoCs

RAMLinx interconnect
RAM of any size and kind in your EFLX® array

1-56/112G Multi-protocol Serdes (Interlaken, JESD204, CPRI, Ethernet, OIF/CEI)
eTopus designs ultra-high speed mixed-signal semiconductor IP solutions for high-performance computing and data center applications. Our 1-56/112Gbps ultra-high speed SerDes IP is adopted by global Ti...

1-56G-PCIe Gen5 ePHY Multi-Protocol SerDes IP - 7nm Low Power and Latency
Ultra-high speed SerDes IP, adopted by global Tier-1 network/storage/5G OEMs and major semiconductor companies. eTopus is the pioneer on PAN4 ADC/DSP-based SerDes, the first startup demonstrated 56Gb...

FlexNoC Network on Chip SoC Interconnect IP
FlexNoC is the ideal interconnect for SoC designs requiring higher performance with minimum area and power. Its flexible architecture makes it the right solution for interconnects with both low latency requirements and high throughput needs. FlexNoC provides support for the additional features that today SoCs require, such as clock domain conversion, width conversion, security, and multi-protocol support. The product supports the AMBA (APB, AHB, AXI) protocols and OCP and can easily be extended to support proprietary protocols.

FlexNoC Resilience Package
The Arteris FlexNoC Resilience Package provides hardware-based data protection for increased SoC reliability and functional safety.

FlexNoC Resilience Package IP
The Arteris FlexNoC Resilience Package is a complementary product to Arteris FlexNoC fabric IP. It implements hardware resilience features essential for systems-on-chip (SoCs) targeted for mission-cri...

Ncore Cache Coherent Interconnect IP
For scalable and area-efficient heterogeneous cache coherent systems.

PIANO 2.0 Automated Interconnect Timing Closure Technology
PIANO 2.0 solves back-end timing problems with technology that works earlier in the SoC design flow, thereby reducing schedule risk.

The AXLinkIO MR IP utilizes the silicon-proven AXLinkIO transceiver architecture for medium-reach and PCIe type of channel links.

CXL 3.0 Dual Mode Controller
CXL is high bandwidth, low latency interconnect lies between host processor and memory devices/accelerators or other network interface cards. CXL cards has same form factor as PCIE , and can be used ...

CXL Host Device Dual mode controllers
Primesoc s CXL IP supports dual mode of Host and device , integrated with PCIE Gen5 and well tested.

Scatter-Gather DMA - AXI4-Stream to/from AXI4 Memory Map Transfers
The Digital Blocks DB-DMAC-MC-AXI4-MM-STREAM Verilog RTL IP Core is a Multi-Channel Scatter-Gather DMA Controller that transfers data between AXI4 Memory Map and AXI4-Stream Interfaces.

Highly configurable Interlaken ILA & ILK
Tamba Networks offers a highly configurable Interlaken ILA and ILK core. The core is compliant with the Interlaken and Interlaken look-aside specifications, and targets FPGA and ASIC operation. The S...


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